SUPAMAS SIRICHOTIYAKUL

Software Engineer

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Experienced software engineer with 10+ years in research and development producing high-quality code in C/C++, plus freelancing in Java, SQL, VBA, and Perl. A self-starter and a fast learner with excellent communication skills and proven experience in teaching and mentoring others.

PATENTS

1. Methods for Analyzing Integrated Circuits and Apparatus Therefor U.S. Patent No. 7,149,674, Issued on December 12, 2006
2. Cross Coupling Delay Characterization for Integrated Circuits U.S. Patent No. 6,799,153, Issued on September 28, 2004
3. Methods for Generating an Optimized Integrated Circuit Cell Library U.S. Patent No. 5,802,349, Issued on September 1, 1998

SKILLS

EDUCATION

• M.S. COMPUTER ENGINEERING University of Louisiana (formerly University of Southwestern Louisiana)
• B.ENG. COMPUTER ENGINEERING Chulalongkorn University Thailand

CERTIFICATES

• JAVA (BASIC) HackerRank - July 2021
• PROBLEM SOLVING (INTERMEDIATE) HackerRank - July 2021
• PROBLEM SOLVING (BASIC) HackerRank - July 2021
• SQL (INTERMEDIATE) HackerRank - July 2021
• SQL (BASIC) HackerRank - July 2021

PAPERS

Citations: 665 Downloads: 1,579

List of published papers

EXPERIENCE

• INDEPENDENT PROGRAMMING & MATH TUTOR 2017 - Present
  • Tutored high school and college students (25-30 students/semester) in:
    • Data Structures and Algorithms, C++ Programming, Java Programming
    • Algebra, Geometry, Calculus, SAT/ACT Math, Mathematics for Business Analysis
  • Students have improved 1-2 grade levels within one semester.
  • Technology: IntelliJ, VS Code, Visual Studio, OneNote, Desmos, Wolfram Alpha


• FREELANCE SOFTWARE DEVELOPER 2015 - 2019
  • Developed a music school management software to perform CRUD operations of student and parent information, class schedule, teacher schedule, room schedule, payments, teacher payroll, exam records, etc. Technology: Java, Netbeans, JDBC, Microsoft SQL, Perl
  • Designed and developed a food catering management software for entering orders, creating invoices, and creating the kitchen pick sheets. Technology: Excel, VBA


• MEMBER OF TECHNICAL STAFF - SUN MICROSYSTEMS, Chelmsford / Burlington, MA 2001 - 2004
  • CAD Software Support: Provided general support, resolved integration issues, developed regression test suites for a noise analysis tool. Technology: Shell script, Perl, Unix
  • VLSI Design: Designed and debugged design issues in a module in UltraSparc V microprocessor.


• MEMBER OF TECHNICAL STAFF (Last position) - MOTOROLA, INC. Tempe, AZ / Austin, TX 1995 - 2001
  • PROMOTED 6 levels in 6 years - Engineering Intern to Principal Staff Software Engineer
  • Technology: C/C++, Unix, Perl, TCL, Shell Scripts, CVS
  • EDA Research and Development: A primary contributor of a noise analysis tool which detects functional failure and timing violation in digital VLSI circuits.
    • Developed new algorithms to analyze cross-coupling noise impact on delay which reduced the average error by 86%.
    • Developed new methods to create a linear model for a victim net driving gate, using BDD manipulations and graph reduction techniques.
    • Led the team effort in testing/quality assurance of code development.
    • Worked with a global team consisting of software engineers in Israel and Russia.
  • EDA Research and Development: A primary contributor of a leakage power measurement and optimization software for multi-threshold voltage chip designs.
    • Developed new algorithms for fast and accurate analysis of leakage power for digital circuits, pioneering the concept of "dominant leakage states", using state probabilities, graph reduction techniques, and simplified non-linear simulation. The leakage power analyzer was 1,000-10,000 times faster than exhaustive SPICE simulations while being within 9% accuracy.
    • Developed new algorithms for leakage and performance optimization for circuits using dual threshold voltage process, achieving 81-100% of the performance of all low-Vt transistors with only 17-33% the leakage current.
  • Support: Various CAD software support for customers in the U.S.
  • CAD Methodology and Integration:
    • Developed a parasitic extraction flow to interface Star-R tool with layout tools (Hercules LVS, Cell3, and Aquarius), a static timing analyzer, and a circuit simulator.
    • Developed a physical design flow including a place and route tool (ArcCell), DRC and LVS checkers (Vericheck), and a netlist translator.
    • Developed a standard cell library optimization and characterization flow using Synopsys Design Compiler and an in-house power calculator.
  • Mentoring: Mentored summer interns and team members on various projects.

VOLUNTEER

CODING INTERVIEW PRACTICE 2020 - PRESENT

• Thai Programmers in USA - Weekly meetings
• Algorithm Practice Group - Weekly meetings